Semiconductor memory device

摘要

A semiconductor memory device includes: a sense amplifier; a plurality of memory cell arrays; a shared MOS transistor that connects/disconnects the sense amplifier and a bit line included in the memory cell arrays; and a control circuit that controls operation of the shared MOS transistor. A part or whole of an in-sense-amplifier bit line that is a bit line connecting the sense amplifier and the shared MOS transistor is embedded in a semiconductor substrate.

主权项

1. A device, comprising:
a semiconductor substrate; first and second bit lines formed in the semiconductor substrate; first and second conductive lines formed over the semiconductor substrate; a first signal line configured to convey a first control signal that changes between first and second logic levels; a first power line configured to convey a first power supply voltage that is a substantially constant level; a first transistor forming a part of a sense amplifier, the first transistor including a first pillar element that comprises a first diffusion layer at one end thereof and a second diffusion layer at an other end thereof, and a first gate electrode that surrounds a part of the first pillar element, the first diffusion layer being coupled to the first bit line, the second diffusion layer being coupled to the first conductive line, and the first gate electrode being coupled to the first signal line; and a second transistor forming another part of the sense amplifier, the second transistor including a second pillar element that comprises a third diffusion layer at one end thereof and a fourth diffusion layer at an other end thereof, and a second gate electrode that surrounds a part of the second pillar element, the third diffusion layer being coupled to the second bit line, the fourth diffusion layer being coupled to the second conductive line, and the second gate electrode being coupled to the power line.