发明名称 |
GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO IMPLEMENT FLOW CONTROL |
摘要 |
An enhanced general input/output communication architecture, protocol and related methods are presented. |
申请公布号 |
US2014304448(A9) |
申请公布日期 |
2014.10.09 |
申请号 |
US201314144309 |
申请日期 |
2013.12.30 |
申请人 |
Intel Corporation |
发明人 |
Ajanovic Jasmin;Harriman David;Fanning Blaise;Lee David |
分类号 |
G06F13/40 |
主分类号 |
G06F13/40 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus, comprising:
a protocol stack including layers to communicate data over an interconnect; wherein the protocol stack including layers comprises a data link layer, and a transactions layer; a transmitter having a first register and a second register; wherein the transmitter is to transmit data on a point to point interconnect; wherein the first register is to store a number of credits received and the second register is to store a number of credits used; and a receiver having at least one register; wherein the at least one register of the receiver is to hold a value to represent a total number of credits sent. |
地址 |
Santa Clara CA US |