发明名称 MEMORY ACCESS CONTROLLER, DATA PROCESSING SYSTEM, AND METHOD FOR MANAGING DATA FLOW BETWEEN A MEMORY UNIT AND A PROCESSING UNIT
摘要 A memory access controller for managing data flow between a memory unit and a processing unit is described. The memory access controller comprises an addressing unit and an unpacking unit. The addressing unit may receive an address from said processing unit and select a data location within said memory unit in dependence on that address. The unpacking unit may read a first word from the selected data location, unpack the first word into a second word by applying a data conversion scheme which depends on the received address, and provide the second word to the processing unit. The data conversion scheme may comprise, for at least one possible address, a pixel format conversion. A data processing system and a method are also proposed.
申请公布号 US2014300615(A1) 申请公布日期 2014.10.09
申请号 US201114358051 申请日期 2011.11.24
申请人 Staudenmaier Michael;Aubineau Vincent;Frank Juergen 发明人 Staudenmaier Michael;Aubineau Vincent;Frank Juergen
分类号 G09G5/395;G09G5/36 主分类号 G09G5/395
代理机构 代理人
主权项 1. A memory access controller for managing data flow between a memory unit and a processing unit, said memory access controller comprising an addressing unit and an unpacking unit, said addressing unit being arranged to receive an address from said processing unit and to select a data location within said memory unit in dependence on said address, said unpacking unit being arranged to read a first word from said selected data location, to unpack said first word into a second word by applying a data conversion scheme which depends on said address, and to provide said second word to said processing unit.
地址 Munich DE