发明名称 |
Nonvolatile semiconductor memory device and operation method of the same |
摘要 |
A nonvolatile semiconductor memory device includes a semiconductor substrate and memory transistors, each of which has a laminate formed by alternately laminating insulating films and conductive films on the semiconductor substrate, a silicon pillar going through the laminate, a tunnel insulating film arranged on the surface of the silicon pillar facing the laminate, a charge accumulating layer arranged on the surface of the tunnel insulating film facing the laminate, and a block insulating film arranged on the surface of the charge accumulating layer facing the laminate and in contact with the conductive film. During a data deletion operation, a voltage is applied on the conductive film so that the potential of the silicon pillar with respect to the conductive film decreases as the cross-sectional area of the silicon pillar decreases. |
申请公布号 |
US8837225(B2) |
申请公布日期 |
2014.09.16 |
申请号 |
US201313787294 |
申请日期 |
2013.03.06 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Higuchi Masaaki;Sekine Katsuyuki;Katsumata Ryota;Hazama Hiroaki |
分类号 |
G11C16/04;G11C16/02;H01L29/788;H01L29/792;G11C16/34;G11C5/02;G11C5/06;H01L27/105;H01L27/115;G11C16/14 |
主分类号 |
G11C16/04 |
代理机构 |
Patterson & Sheridan LLP |
代理人 |
Patterson & Sheridan LLP |
主权项 |
1. A nonvolatile semiconductor memory device comprising:
a semiconductor substrate; a laminate including insulating films and conductive films alternately formed above the semiconductor substrate; a silicon pillar formed through the laminate to have a tapered cross-section; a tunnel insulating film disposed on a surface of the silicon pillar facing the laminate; a charge accumulating layer disposed on a surface of the tunnel insulating film facing the laminate; and a block insulating film disposed on a surface of the charge accumulating layer facing the laminate and in contact with the conductive film, wherein, when a voltage is applied on the conductive film during a data deletion operation for the nonvolatile semiconductor memory device, the potential of the silicon pillar with respect to the conductive film decreases as the cross-sectional area of the silicon pillar becomes smaller. |
地址 |
Tokyo JP |