发明名称 |
Reference current source circuit and system |
摘要 |
A reference current source circuit includes a reference voltage generating module, a voltage buffer, an equivalent resistance, a filter capacitor, a current mirror module and a reference current outputting terminal. The voltage buffer includes an operational amplifier and a first FET. The current mirror module includes a second FET and a third FET. The equivalent resistor includes an oscillator, a fourth FET, a fifth FET and a capacitor connected to the fourth FET and the fifth FET. The oscillator is for generating a clock signal whose frequency is related to a charging and discharging capacitor in the oscillator to control charging and discharging of the capacitor in the equivalent resistance. The reference current outputting terminal is for outputting a reference current only related to a capacitance ratio of the capacitor to the charging and discharging capacitor. A reference current source system is further disclosed. |
申请公布号 |
US8836314(B2) |
申请公布日期 |
2014.09.16 |
申请号 |
US201213494994 |
申请日期 |
2012.06.13 |
申请人 |
IPGoal Microelectronics (Sichuan) Co., Ltd. |
发明人 |
Zhu Guojun |
分类号 |
G05F3/16;G05F3/20;G05F1/56 |
主分类号 |
G05F3/16 |
代理机构 |
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代理人 |
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主权项 |
1. A reference current source circuit comprising a reference voltage generating module, a voltage buffer connected to said reference voltage generating module, an equivalent resistor connected to said voltage buffer, a filter capacitor connected to said voltage buffer, a current mirror module connected to said voltage buffer and a reference current outputting terminal connected to said current mirror module, wherein said voltage buffer comprises an operational amplifier and a first FET connected to said operational amplifier; said current mirror module comprises a second FET and a third FET connected to said second FET; said equivalent resistor comprises an oscillator, a fourth FET connected to said oscillator, a fifth FET connected to said oscillator and a capacitor connected to said fourth FET and said fifth FET; a charging and discharging capacitor is provided in said oscillator; said oscillator is for generating a clock signal whose frequency is only related to said charging and discharging capacitor to control charging and discharging of said capacitor of said equivalent resistance; said reference current outputting terminal is for outputting a reference current related to a capacitance ratio of said capacitor to said charging and discharging capacitor. |
地址 |
Chengdu, Sichuan Province CN |