| 发明名称 | Sigma-delta ADC with test circuitry | ||
| 摘要 | The invention concerns a sigma-delta switched capacitor analog to digital converter (ADC) having: an input line for receiving a signal to be converted; first, second and third inputs for respectively receiving first, second and third test voltages; and switching circuitry adapted to apply, during a test mode of the sigma-delta ADC, a ternary test signal to the input line by periodically selecting, based on a digital test control signal, one of the first, second or third test voltages to be applied to the input line. | ||
| 申请公布号 | US8830098(B2) | 申请公布日期 | 2014.09.09 |
| 申请号 | US201113807632 | 申请日期 | 2011.06.28 |
| 申请人 | STMicroelectronics International NV | 发明人 | Mir Salvador;Stratigopoulos Haralampos;Dubois Matthieu |
| 分类号 | H03M3/00 | 主分类号 | H03M3/00 |
| 代理机构 | Kaplan Breyer Schwarz & Ottesen, LLP | 代理人 | Kaplan Breyer Schwarz & Ottesen, LLP |
| 主权项 | 1. A sigma-delta switched capacitor analog to digital converter (ADC) comprising: an input line for receiving a signal to be converted; and switching circuitry adapted to apply, during a test mode of said sigma-delta ADC, a ternary test signal to said input line by periodically selecting, based on a digital test control signal, one of first, second or third test voltages to be applied to said input line. | ||
| 地址 | Genève CH | ||