发明名称 SEMICONDUCTOR STORAGE DEVICE AND TESTING METHOD
摘要 A plurality of writing circuits respectively writes data to a plurality of memory cell arrays and a redundant cell array. A holding circuit, which is arranged for each memory cell array, holds data input as a storage target. A first selection circuit, which is arranged for each of the writing circuits of the memory cell arrays, selects data to be output to the writing circuits from among pieces of data input from the holding circuit of the memory cell array and holding circuits of other memory cell arrays. A switching circuit makes two or more first selection circuits select same data and to input the same data to three or more writing circuits so that the same data is written to two or more memory cell arrays and the redundant cell array when a prescribed signal becomes active.
申请公布号 US2014247679(A1) 申请公布日期 2014.09.04
申请号 US201414277856 申请日期 2014.05.15
申请人 FUJITSU LIMITED 发明人 Murata Seiji
分类号 G11C29/12;G11C29/00 主分类号 G11C29/12
代理机构 代理人
主权项 1. A semiconductor storage device comprising: a plurality of memory cell arrays; a redundant cell array which is a backup memory cell array of the memory cell arrays; a plurality of writing circuits configured to respectively write data to the plurality of memory cell arrays and the redundant cell array; a holding circuit, which is arranged for each memory cell array, configured to hold data input as a storage target; a first selection circuit, which is arranged for each of the writing circuits of the memory cell arrays, configured to select data to be output to the writing circuits from among pieces of data input from the holding circuit of the memory cell array and holding circuits of other memory cell arrays; and a switching circuit configured to make two or more first selection circuits select same data and to input the same data to three or more writing circuits so that the same data is written to two or more memory cell arrays and the redundant cell array when a prescribed signal becomes active.
地址 Kawasaki-shi JP
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