发明名称 Integrated Circuit with Standard Cells
摘要 A die includes a plurality of rows of standard cells. Each of all standard cells in the plurality of rows of standard cells includes a transistor and a source edge, wherein a source region of the transistor is adjacent to the source edge. No drain region of any transistor in the each of all standard cells is adjacent to the source region.
申请公布号 US2014239410(A1) 申请公布日期 2014.08.28
申请号 US201313829484 申请日期 2013.03.14
申请人 Ltd. Taiwan Semiconductor Manufacturing Company 发明人 Yang Kuo-Nan;Lin Chou-Kun;Kao Jerry Chang-Jui;Tsai Yi-Chuin;Chao Chien-Ju;Wang Chung-Hsing
分类号 H01L27/02 主分类号 H01L27/02
代理机构 代理人
主权项 1. A die comprising: a plurality of rows of standard cells, wherein each of all standard cells in the plurality of rows of standard cells comprises: a transistor; anda first source edge, wherein a source region of the transistor is adjacent to the first source edge, and wherein no drain region of any transistor in the each of all standard cells is adjacent to the source region.
地址 US