发明名称 Signal flow control through clock signal rate adjustments
摘要 Control circuitry and adjustable clock signal generation circuitry is provided to control the signal transmission rate for electronic devices and systems of electronic devices. The control circuitry may receive status signals indicating current clock rates of a signal transmitting and receiving circuit as well as current processing capacity from the signal receiving circuit. The control circuitry may then generate control signals which control adjustable clock signal generation circuitry. The adjustable clock signal generation circuitry may be used to adjust the rate of generated clock signals for the signal transmitting and receiving circuits which can increase or decrease the signal transmission rate between those circuits.
申请公布号 US8810299(B2) 申请公布日期 2014.08.19
申请号 US201213648146 申请日期 2012.10.09
申请人 Altera Corporation 发明人 Baeckler Gregg William;Mendel David W.
分类号 G06F1/04;H03K3/00 主分类号 G06F1/04
代理机构 代理人 Wu Chih-Yun
主权项 1. A method for operating an electronic device that includes first and second circuits, wherein the first circuit operates using a first clock signal, wherein the second circuit operates using a second clock signal, and wherein the first and second clock signals have respective clock rates, the method comprising: generating a status information related to the operation of the second circuit; deciding whether adjusting the clock rate of the first clock signal is required based on the status information; deciding whether adjusting the clock rate of the second clock signal is required based on the status information; and adjusting the clock rate of the first clock signal and the clock rate of the second clock signal if the adjustment is required.
地址 San Jose CA US