AMPLIFIER AND WIRELESS COMMUNICATION DEVICE

摘要

In a power amplifier including an amplifier circuit unit for high power mode and an amplifier circuit unit for low power mode provided in parallel thereto between input and output of the amplifier and where, when one amplifier circuit unit is in an operating state, the other amplifier circuit unit is in a non-operating state, a cross-coupled capacitor is provided between a drain of one of two transistors in output side and a gate of the other transistor in the amplifier circuit unit for high power mode, and a series circuit where a switch and a capacitor are coupled in series is coupled between a drain of the transistor of output side in the amplifier circuit unit for low power mode and a ground, the switch being in a conducting state in high power mode operation and being in a non-conducting state in low power mode operation.

主权项

1. An amplifier comprising:
a first amplifier circuit unit configured to output a signal having a maximum output power of the amplifier; and a second amplifier circuit unit provided in parallel with the first amplifier circuit unit between an input and an output of the amplifier and having a higher amplification efficiency than the first amplifier circuit unit in an output power lower than an output power of the first amplifier circuit unit, wherein, when one of the first amplifier circuit unit and the second amplifier circuit unit is in an operating state in which power amplification of a signal is performed, the other of the first amplifier circuit unit and the second amplifier circuit unit is in a non-operating state in which power amplification of the signal is not performed, wherein the first amplifier circuit unit includes:
a first transistor whose drain is coupled to a first output node of the first amplifier circuit unit;a second transistor whose drain is coupled to a second output node of the first amplifier circuit unit; anda cross-coupled capacitor provided between the drain of one of the first transistor and the second transistor and a gate of the other of the first transistor and the second transistor, and wherein the second amplifier circuit unit includes:
a first capacitor;a third transistor whose drain is coupled to an output node of the second amplifier circuit unit via the first capacitor;a first inductor coupled to a drain of the third transistor; anda series circuit in which a first switch and a second capacitor are coupled in series between the drain of the third transistor and a ground, the first switch being in a conducting state when the first amplifier circuit unit is in the operating state and being in a non-conducting state when the second amplifier circuit unit is in the operating state.