Decision feedforward equalization

摘要

In described embodiments, a Decision Feed Forward Equalizer (DFFE) comprises a hybrid architecture combining features of a Feed Forward Equalizer (FFE) and a Decision Feedback Equalizer (DFE). An exemplary DFFE offers relatively improved noise and crosstalk immunity than an FFE implementation alone, and relatively lower burst error propagation than a DFE implementation alone. The exemplary DFFE is a relatively simple implementation due few or no critical feedback paths, as compared to a DFE implementation alone. The exemplary DFFE allows for a parallel implementation of its DFE elements without an exponential increase in the hardware for higher numbers of taps. The exemplary DFFE allows for cascading, allowing for progressive improvement in BER, at relatively low implementation cost as a solution to achieve multi-tap DFE performance.

主权项

1. Apparatus for generating data from an input signal received from a channel, the apparatus comprising:
a sampling module configured to generate samples from the input signal; a feed-forward equalizer stage configured to i) apply feed-forward equalization to the samples and ii) generate feed-forward decisions corresponding to the samples, wherein the feed-forward equalizer stage comprises:
a feed-forward equalizer configured to apply feed-forward equalization to the samples; anda feed-forward equalizer stage decision device configured to generate feed-forward decisions corresponding to the samples based on a comparison of each feed-forward equalized sample with at least one corresponding threshold; a decision feed-forward stage comprising:
a latency matching module configured to adjust a delay of the feed forward equalized samples in accordance with the feed-forward decisions corresponding to the samples to generate latency-matched feed-forward equalized samples,logic configured to i) generate a combination of the feed-forward equalized decisions and at least one filter tap value based on a transfer function of the channel, and ii) subtract the combination from the latency-matched feed-forward equalized samples, anda decision device configured to generate decision feed-forward equalized (DFFE) decisions from the output of the logic.