发明名称 Error correction device, error correction method, and processor
摘要 An error correction device includes: an error correction code generator that generates, from information unit data of data with a parity bit which includes m bytes of information unit data in which each byte has n bits of data and a total of m parity bits where 1 bit is provided for every 1 byte of the information unit data, a bit other than a bit corresponding to the parity bit out of bits constituting an error correction code used for correcting an error in the information unit data; an error detector that detects an error in the information unit data by generating an exclusive-OR of the data with a parity bit; and an error corrector that corrects an error in the information unit data by using a parity bit included in the data with a parity bit and the bit generated by the error correction code generator.
申请公布号 US8775899(B2) 申请公布日期 2014.07.08
申请号 US201213566285 申请日期 2012.08.03
申请人 Fujitsu Limited 发明人 Kamoshida Shiro
分类号 H03M13/00;H03M13/11;H03M13/09;H03M13/29 主分类号 H03M13/00
代理机构 Fujitsu Patent Center 代理人 Fujitsu Patent Center
主权项 1. An error correction device comprising: an error correction code generator that generates, from information unit data of data with a parity bit which includes m bytes of information unit data in which each byte has n bits of data and a total of m parity bits where 1 bit is provided for every 1 byte of the information unit data, a bit other than a bit corresponding to the parity bit out of bits constituting an error correction code used for correcting an error in the information unit data; an error detector that detects an error in the information unit data by generating an exclusive-OR of the data with a parity bit; and an error corrector that corrects an error in the information unit data by using a parity bit included in the data with a parity bit and the bit generated by the error correction code generator when the error is detected in the information unit data by the error detector.
地址 Kawasaki JP