发明名称 Semiconductor device, and method for manufacturing semiconductor device
摘要 A semiconductor device includes: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures. The element isolation insulating layer includes at least one of SiO2, SiN, and SiON, the upper insulating layer is an oxide containing at least one metal M selected from the group consisting of a rare earth metal, Y, Zr, and Hf, and Si, and respective lengths Lcharge, Ltop, and Lgate of the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation “Lcharge<Ltop and Lgate<Ltop”.
申请公布号 US8754467(B2) 申请公布日期 2014.06.17
申请号 US201313944989 申请日期 2013.07.18
申请人 Kabushiki Kaisha Toshiba 发明人 Shingu Masao;Takashima Akira;Muraoka Koichi
分类号 H01L29/792 主分类号 H01L29/792
代理机构 Oblon, Spivak, McClelland, Maier &amp; Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier &amp; Neustadt, L.L.P.
主权项 1. A semiconductor device, comprising: a semiconductor region; a plurality of stacked structures each of which is disposed on the semiconductor region and has a tunnel insulating film, a charge storage layer, an upper insulating layer, and a control electrode stacked sequentially; an element isolation insulating layer disposed on side faces of the plurality of stacked structures; and a source-drain region disposed on the semiconductor region and among the plurality of stacked structures, wherein the element isolation insulating layer includes at least one of SiO2, SiN, and SiON; wherein the upper insulating layer is an oxide containing Al, La, and Si; wherein a ratio NSi/NLa of the number NSi of Si to the number NLa of La is equal to or lower than a ratio with which permittivity of the upper insulating layer matches that of Al2O3; wherein a ratio NAl/NLa of the number NAl of Al to the number NLa of La is equal to or higher than 0.0625 and is equal to or lower than 96; wherein a ratio NSi/(NLa+NAl) of the number NSi of Si to the sum of the numbers NLa and NAl of La and Al contained in the upper insulating layer is equal to or higher than 0.6; and wherein respective lengths Lcharge, Ltop, and Lgate of the charge storage layer, the upper insulating layer, and the control electrode in a channel length direction satisfy the relation “Lcharge<Ltop and Lgate<Ltop”.
地址 Minato-ku JP