Internal Logic Analyzer with Programmable Window Capture

摘要

One embodiment includes receiving a data signal transmitted to the processing unit, analyzing the data signal and generating feedback information related to the data signal, and capturing the data signal via a write enable during a plurality of clock cycles specified by a programmable controller included within the processing unit. One advantage of the disclosed technique is that the programmable controller can be used to set the capture window for one or more hardwired triggers included within the processing unit. Further, the programmable controller is able to set up additional triggers that separate and apart from the hardwired triggers included within the processing unit and set the capture window for those triggers. Thus, the disclosed technique provides a highly flexible and adaptive approach for capturing and storing on-chip data and feedback information that can be analyzed later when performing diagnostic and debugging operations.

主权项

1. A method for capturing debug data within a processing unit, the method comprising:
receiving a data signal transmitted to the processing unit; analyzing the data signal and generating feedback information related to the data signal; and capturing the data signal via a write enable during a plurality of clock cycles specified by a programmable controller included within the processing unit.