Memory Disturbance Recovery Mechanism

摘要

Components of a memory system, such as a memory controller and memory device, which detect accumulated memory read disturbances and correct such disturbances before they reach a level that causes errors. The memory device includes a memory array and a disturbance control circuit. The memory array includes a plurality of memory rows. Each memory row is associated with a disturbance warning circuit having a state that corresponds to an accumulated disturbance in the memory row. The disturbance control circuit determines, responsive to an activation of a memory row of the plurality of memory rows specified by a row access command, whether the disturbance condition is present in the memory row based on the state of the disturbance warning circuit associated with the memory row. If a disturbance condition is present, the disturbance control circuit causes a recovery operation to be performed on the memory row to reduce the accumulated disturbances.

主权项

1. A method of operation in a memory device, the method comprising:
responsive to activation of a memory row specified by a row access command, determining whether a disturbance condition is present in the memory row based on a state of a disturbance warning circuit associated with the memory row, the state of the disturbance warning circuit corresponding to accumulated disturbances of the memory row; and performing a recovery operation on the memory row to reduce the accumulated disturbances responsive to determining that the disturbance condition is present.