Semiconductor memory apparatus

摘要

A semiconductor memory apparatus includes a first switch, a second switch and a control unit. The first switch couples/separates a first bit line and a sense amplifier to/from each other in response to a first bit line separation signal. The second switch couples a second bit line and the sense amplifier to each other in response to a second bit line separation signal. The control unit generates a bit line separation signal for a refresh operation, of which enable period is shorter than that of the second bit line separation signal, and provides the generated bit line separation signal for the refresh operation to the second switch in the refresh operation.

主权项

1. A semiconductor memory apparatus, comprising:
a first switch configured to connect/separate a first bit line and a sense amplifier to/from each other in response to a first bit line separation signal; a second switch configured to couple a second bit line and the sense amplifier to each other in response to a second bit line separation signal or a bit line separation signal for a refresh operation; and a control unit configured to generate the bit line separation signal for the refresh operation, of which enable period is shorter than that of the second bit line separation signal, and provide the generated bit line separation signal for the refresh operation to the second switch in a refresh operation, wherein the control unit generates the second bit line separation signal in a non-refresh operation.