摘要 |
The present invention relates to a phase locked loop (PLL) which includes a phase comparator for detecting the phase difference between a reference clock and an output clock of a voltage control oscillator and a current controller for driving a charge pump according to the result of the phase comparator, wherein the current controller compares the reference clock with the output clock and supplies current to a charge pump by gradually decreasing the current when the phase of the output clock is locked for a predetermined clock duration. According to the present invention, power consumption can decrease without influence on an output clock because current starts to decrease gradually when the phase is fixed and the PLL is stabilized after a predetermined clock duration. The maximum current is applied to the charge pump when the channel varies or the phase is locked, so that the frequency and the phase can be rapidly fixed. Therefore, the power consumption decreases, thereby significantly reducing noise during the low current driving and reducing the jitter of the frequency. |