发明名称 |
Gate-all around semiconductor nanowire FET's on bulk semicoductor wafers |
摘要 |
Non-planar semiconductor devices are provided that include at least one semiconductor nanowire suspended above a semiconductor oxide layer that is present on a first portion of a bulk semiconductor substrate. An end segment of the at least one semiconductor nanowire is attached to a first semiconductor pad region and another end segment of the at least one semiconductor nanowire is attached to a second semiconductor pad region. The first and second pad regions are located above and are in direct contact with a second portion of the bulk semiconductor substrate which is vertically offsets from the first portion. The structure further includes a gate surrounding a central portion of the at least one semiconductor nanowire, a source region located on a first side of the gate, and a drain region located on a second side of the gate which is opposite the first side of the gate. |
申请公布号 |
US8698128(B2) |
申请公布日期 |
2014.04.15 |
申请号 |
US201213405682 |
申请日期 |
2012.02.27 |
申请人 |
SLEIGHT JEFFREY W.;CHANG JOSEPHINE B.;LAUER ISAAC;NARASIMHA SHREESH;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
SLEIGHT JEFFREY W.;CHANG JOSEPHINE B.;LAUER ISAAC;NARASIMHA SHREESH |
分类号 |
H01L29/775 |
主分类号 |
H01L29/775 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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