| 摘要 |
<p>A semiconductor chip comprises: a selection phase clock generation unit which generates a phase clock from an external clock and a reversed external clock, generates a test phase clock from a first test external clock and a second test external clock, and outputs the phase clock and the test phase clock as a selection phase clock in response to a test mode signal; and a data input/output unit for inputting/outputting data by synchronizing to the selection phase clock. [Reference numerals] (11) First semiconductor chip; (14) Mode control unit; (15) Memory cell; (16) Data input/output unit; (2) Phase clock generating unit; (3) Test phase clock generating unit; (4) Multiplexer</p> |
