发明名称 SEMICONDUCTOR MEMORY DEVICE AND READ WAIT TIME ADJUSTMENT METHOD THEREOF, MEMORY SYSTEM, AND SEMICONDUCTOR DEVICE
摘要 A system including a controller and a memory device interconnected to the controller; the controller includes a set of first terminals that is connected to the memory device through a set of first signal lines, and a control circuit configured to generate and output onto the set of first terminals edge specifying information that takes a selected one of first and second states, the edge specifying information being supplied to the memory device to cause the memory device to activate a data strobe signal at a first timing when the selected one of the edge specifying information is the first state and at a second timing, that is different from the first timing, when the edge specifying information is the second state. The control circuit is further configured to generate and output onto the set of first terminals a read command, the read command being supplied to the memory device.
申请公布号 US2014036607(A1) 申请公布日期 2014.02.06
申请号 US201314049029 申请日期 2013.10.08
申请人 ELPIDA MEMORY, INC. 发明人 KOSHIZUKA ATSUO
分类号 G11C7/22 主分类号 G11C7/22
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