| 摘要 |
A method for operating a non-volatile memory device which includes a plurality of memory cells serially coupled between a source selection transistor and a drain selection transistor, a first dummy memory cell coupled between the source selection transistor and the memory cells, and a second dummy memory cell coupled between the drain selection transistor and the memory cells includes applying a verification voltage to a gate of a selected memory cell, applying a first voltage to gates of unselected memory cells, and applying a second voltage that is lower than the first voltage to a gate of at least one of the first dummy memory cell and the second dummy memory cell, during a program verification operation. |
