发明名称 SIDEWALL PROTECTION OF LOW-K MATERIAL DURING ETCHING AND ASHING
摘要 <p>A method for protecting an exposed low-k surface is described. The method includes providing a substrate having a low-k insulation layer formed thereon and one or more mask layers overlying the low-k insulation layer with a pattern formed therein. Additionally, the method includes transferring the pattern in the one or more mask layers to the low-k insulation layer using one or more etching processes to form a trench and/or via structure in the low-k insulation layer. The method further includes forming an insulation protection layer on exposed surfaces of the trench and/or via structure during and/or following the one or more etching processes by exposing the substrate to a film forming compound containing C, H, and N. Thereafter, the method includes removing at least a portion of the one or more mask layers using a mask removal process.</p>
申请公布号 WO2013192323(A1) 申请公布日期 2013.12.27
申请号 WO2013US46606 申请日期 2013.06.19
申请人 TOKYO ELECTRON LIMITED;TOKYO ELECTRON U.S. HOLDINGS, INC. 发明人 CHIBA, YUKI
分类号 H01L21/302;H01L21/31;H01L21/311;H01L21/469;H01L23/02 主分类号 H01L21/302
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