发明名称 |
Apparatus for predicate calculation in processor instruction set |
摘要 |
An apparatus and method for calculating flag bits is disclosed. The flag bits may be used in a processor utilizing branch predication. More particularly, the apparatus and method may be used to calculate a predicate that can be used by a branch unit to evaluate whether a branch is to be taken. In one embodiment, the apparatus is coupled to receive a condition code associated with an instruction, and flag bits generated responsive to execution of the instruction. The condition code is indicative of a condition to be checked resulting from execution of the instruction. The apparatus may then provide an indication of whether the condition is true. |
申请公布号 |
EP2660717(A3) |
申请公布日期 |
2013.12.25 |
申请号 |
EP20130165988 |
申请日期 |
2013.04.30 |
申请人 |
APPLE INC. |
发明人 |
GOEL, RAJAT;GUPTA, SANDEEP;MODUKURU, YAMINI |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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