| 摘要 |
PROBLEM TO BE SOLVED: To suppress an increase in on-resistance of a vertical transistor.SOLUTION: A low-concentration P-type impurity layer PL is located on a drain layer DRN and has a lower impurity concentration than the drain layer DRN. A base layer BSE is an N-type impurity layer and located on the low-concentration P-type impurity layer PL. A gate insulating film GI is formed on a side surface of a recess TRN. A bottom-surface insulating film BI is formed in the lower parts of the bottom and side surfaces of the recess TRN and thicker than the gate insulating film GI. A gate electrode GT1 is embedded in the recess TRN. In a first cross section which is a cross section in a thickness direction including the bottom surface of the recess TRN, a first profile which is a P-type impurity concentration of the low-concentration P-type impurity layer PL is substantially constant. The difference between maximum and minimum values is not more than 10% of an average value of the maximum and minimum values. The first profile also has a maximum vale and a minimum value positioned closer to the drain layer side than the maximum value. |
