Integrated circuit device and method of using combinatorial logic in a data processing circuit

摘要

An integrated circuit device comprising one or more data processing circuits, each having an input stage, a combinatorial logic stage and an output stage. The input stage is responsive to a clock signal, and receives at least a first and second set of data signals and provides the first set to an input of the logic stage during a first portion of a clock signal period, and provides the second set to the input during a second portion of the period. The output stage is responsive to the clock signal, and receives from an output of the logic stage at least a first result signal as a function of the first set during a first portion of a subsequent clock signal period and receives from the output at least a second result signal as a function of the second set during a second portion of the subsequent period.