IMPEDANCE MATCHING BETWEEN FPGA AND MEMORY MODULES

摘要

Embodiments of the present invention provide impedance matching between a Field Programmable Gate Array (FPGA) and memory modules in a semiconductor storage device (SSD) system architecture. Specifically, a set (at least one) of memory modules is coupled to an FPGA. A damping resistor is placed at the impedance mismatching point to reduce signal noise.