发明名称 |
Semiconductor integrated circuit |
摘要 |
A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed in an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory area, which memorize information depending on the difference of threshold voltages. The first nonvolatile memory area has a maximum variation width of a threshold voltage for memorizing an information set larger than that of the second nonvolatile memory area. The first nonvolatile memory area can be prioritized to expedite a read speed of the memory information, and the second nonvolatile memory area can be prioritized to guarantee the number of times of rewrite operation of memory information.
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申请公布号 |
US8576643(B2) |
申请公布日期 |
2013.11.05 |
申请号 |
US201213368461 |
申请日期 |
2012.02.08 |
申请人 |
SHINAGAWA YUTAKA;KATAOKA TAKESHI;ISHIKAWA EIICHI;TANAKA TOSHIHIRO;YANAGISAWA KAZUMASA;SUZUKAWA KAZUFUMI;RENESAS ELECTRONICS CORPORATION |
发明人 |
SHINAGAWA YUTAKA;KATAOKA TAKESHI;ISHIKAWA EIICHI;TANAKA TOSHIHIRO;YANAGISAWA KAZUMASA;SUZUKAWA KAZUFUMI |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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