| 摘要 |
A system having a memory and a processor is disclosed. The memory may be arranged as (i) a first pipeline to buffer a plurality of full resolution fields and (ii) a second pipeline to buffer a plurality of low resolution fields. The processor is generally configured to (i) receive a particular one or more of the full resolution fields and a particular one or more of the low resolution fields from the memory and (ii) generate a film mode signal based on the particular low resolution fields, the film mode signal indicating a current mode among a plurality of pull-down modes related to a current field being deinterlaced.
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