发明名称 Reliability evaluation and system fail warning methods using on chip parametric monitors
摘要 A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.
申请公布号 US8504975(B2) 申请公布日期 2013.08.06
申请号 US201213344178 申请日期 2012.01.05
申请人 BICKFORD JEANNE P.;GOSS JOHN R.;HABIB NAZMUL;MCMAHON ROBERT;MENTOR GRAPHICS CORPORATION 发明人 BICKFORD JEANNE P.;GOSS JOHN R.;HABIB NAZMUL;MCMAHON ROBERT
分类号 G06F17/50 主分类号 G06F17/50
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