发明名称 Resistance change memory
摘要 A memory includes memory cells each includes a resistance change element and a diode, and each memory cell between one of row lines and one of column lines, a first decoder which selects one of the row lines as a selected row line, a second decoder which selects one of the column lines as a selected column line, a voltage pulse generating circuit which generates a voltage pulse, a voltage pulse shaping circuit which makes a rise time and a fall time of the voltage pulse longer, and a control circuit which applies the voltage pulse outputting from the voltage pulse shaping circuit to unselected column lines except the selected column line, and which applies a fixed potential to unselected row lines except the selected row line, in a data writing to a memory cell which is provided between the selected row line and the selected column line.
申请公布号 US8498142(B2) 申请公布日期 2013.07.30
申请号 US201113072029 申请日期 2011.03.25
申请人 MUROOKA KENICHI;KABUSHIKI KAISHA TOSHIBA 发明人 MUROOKA KENICHI
分类号 G11C11/00 主分类号 G11C11/00
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