| 摘要 |
Data processing system 5 includes a cluster of data processing units 521-52N, shared storage 56 and bus system 54. Each data processing unit 52 comprises scalar processor device 101, heterogeneous processor device (HPU) 102 and local memory device 103. The scalar processor executes a series of instructions including instructions for execution on the HPU which it forwards automatically. Task-based scheduling includes the maintenance of a task descriptor list TL to hold task information and a free list FL of data processing units available to perform tasks. Each data processing unit is operable to retrieve PB a task descriptor from the list and to update that task descriptor PC,PD based upon a state of execution of that task. Upon completion of a task PG a data processing unit may append PH the address of its wake-up mechanism to the free list and enter a low-power mode. A data processing unit on the free list may be awoken PF to perform a task by writing the address of a task descriptor to the address of the wake-up mechanism. |
