发明名称 Nonvolatile memory and method for improved programming with reduced verify
摘要 A group of memory cells of a nonvolatile memory is programmed in parallel in a programming pass with a minimum of verify steps from an erased state to respective target states by a staircase waveform. The memory states are demarcated by a set of increasing demarcation threshold values (V1, . . . , VN). Initially in the programming pass, the memory cells are verified relative to a test reference threshold value. This test reference threshold has a value offset past a designate demarcation threshold value Vi among the set by a predetermined margin. The overshoot of each memory cell when programmed past Vi, to be more or less than the margin can be determined. Accordingly, memory cells found to have an overshoot more than the margin are counteracted by having their programming rate slowed down in a subsequent portion of the programming pass so as to maintain a tighter threshold distribution.
申请公布号 US8472257(B2) 申请公布日期 2013.06.25
申请号 US201113071170 申请日期 2011.03.24
申请人 DONG YINGDA;OOWADA KEN;HSU CYNTHIA;SANDISK TECHNOLOGIES INC. 发明人 DONG YINGDA;OOWADA KEN;HSU CYNTHIA
分类号 G11C16/10 主分类号 G11C16/10
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