发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To reduce power consumption during write operation. <P>SOLUTION: A semiconductor device comprises: a divider circuit 100 that generates a plurality of frequency-dividing clock signals CLK0 to CLKn each having a different phase by frequency-dividing an external clock signal CK; a multiplication circuit 200 that generates an internal clock signal CLKDQ by multiplying the frequency-dividing clock signals CLK0 to CLKn; and a data input/output circuit 300. In read operation, the data input/output circuit 300 serially outputs a plurality of read data items, which are supplied in parallel, in synchronization with the internal clock signal CLKDQ; and in write operation, it outputs in parallel a plurality of write data items, which are serially supplied, in synchronization with the frequency dividing clock signal CLK0. Thus, it is not necessary to transmit all of the plurality of frequency-dividing clock signals CLK0 to CLKn each having a different phase during write operation, and consequently, power consumption during write operation is reduced. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013125561(A) 申请公布日期 2013.06.24
申请号 JP20110273433 申请日期 2011.12.14
申请人 ELPIDA MEMORY INC 发明人 MATSUI YOSHINORI
分类号 G11C11/4076;G11C11/407;H01L21/822;H01L21/8242;H01L27/04;H01L27/108 主分类号 G11C11/4076
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