发明名称 Semiconductor Device and Method of Forming Vertically Offset Bond on Trace Interconnect Structure on Leadframe
摘要 A semiconductor device has a vertically offset BOT interconnect structure. The vertical offset is achieved with a leadframe having a plurality of lead fingers around a die paddle. A first conductive layer is formed over the lead fingers. A second conductive layer is formed over the lead fingers. Each second conductive layer is positioned adjacent to the first conductive layer and each first conductive layer is positioned adjacent to the second conductive layer. The second conductive layer has a height greater than a height of the first conductive layer. The first and second conductive layers can have a side-by-side arrangement or staggered arrangement. Bumps are formed over the first and second conductive layers. Bond wires are electrically connected to the bumps. A semiconductor die is mounted over the die paddle of the leadframe and electrically connected to the bond wires and BOT interconnect structure.
申请公布号 US2013154067(A1) 申请公布日期 2013.06.20
申请号 US201313765594 申请日期 2013.02.12
申请人 STATS CHIPPAC, LTD.;STATS CHIPPAC, LTD. 发明人 PAGAILA REZA A.;JANG KIYOUN;LEE HUNTEAK
分类号 H01L23/495 主分类号 H01L23/495
代理机构 代理人
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