发明名称 MEMORY WITH A SHARED I/O INCLUDING AN OUTPUT DATA LATCH HAVING AN INTEGRATED CLAMP
摘要 A memory includes a shared I/O unit that is shared between multiple storage arrays provides output data from the arrays. The shared I/O includes an output latch with an integrated output clamp. The I/O unit may be configured to provide output data from the storage arrays via data output signal paths. The I/O unit includes an output latch configured to force a valid logic level on the data output signal paths in response to a power down condition.
申请公布号 US2013141988(A1) 申请公布日期 2013.06.06
申请号 US201113311340 申请日期 2011.12.05
申请人 MCCOMBS EDWARD M.;CHOW DANIEL C.;JONES KENNETH W.;RUNAS ALEXANDER E. 发明人 MCCOMBS EDWARD M.;CHOW DANIEL C.;JONES KENNETH W.;RUNAS ALEXANDER E.
分类号 G11C7/10 主分类号 G11C7/10
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