发明名称 DYNAMIC PROCESS/OBJECT SCOPED MEMORY AFFINITY ADJUSTER
摘要 An apparatus, method, and program product for optimizing a multiprocessor computing system by sampling memory reference latencies and adjusting components of the system in response thereto. During execution of processes the computing system, memory reference sampling of memory locations from shared memory of the computing system referenced in the executing processes is performed. Each sampled memory reference collected from sampling is associated with a latency and a physical memory location in the shared memory. Each sampled memory reference is analyzed to identify segments of memory locations in the shared memory corresponding to a sub-optimal latency, and based on the analyzed sampled memory references, the physical location of the one or more identified segments, the processor on which one or more processes referencing the identified segments, and/or a status associated with the one or more identified segments is dynamically adjusted to thereby optimize memory access for the multiprocessor computing system.
申请公布号 WO2013080434(A1) 申请公布日期 2013.06.06
申请号 WO2012JP06910 申请日期 2012.10.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;IBM JAPAN, LTD. 发明人 KURTZ, JAY P.;NELSON, GLEN W.
分类号 G06F15/17;G06F9/50;G06F12/08 主分类号 G06F15/17
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