发明名称 |
Tolerable Flare Difference Determination |
摘要 |
Aspects of the invention relate to techniques for compensating flare effects in a lithographic process for an array of identical circuits to be fabricated on a wafer. According to various implementations of the invention, a reference circuit is selected from the array of identical circuits and intolerable flare difference regions are determined based on flare difference layers and tolerable flare difference layers. The lithographic process result for the array of identical circuit may be derived from that for the reference circuit and the intolerable flare difference regions.
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申请公布号 |
US2013104091(A1) |
申请公布日期 |
2013.04.25 |
申请号 |
US201113279176 |
申请日期 |
2011.10.21 |
申请人 |
KOMIRENKO SERGIY;COBB NICOLAS BAILEY;CHALASANI RAGHU;MENTOR GRAPHICS CORPORATION |
发明人 |
KOMIRENKO SERGIY;COBB NICOLAS BAILEY;CHALASANI RAGHU |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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