发明名称 MEMORY ARBITRATION CIRCUITRY
摘要 <P>PROBLEM TO BE SOLVED: To provide a dual-port memory having first and second ports. <P>SOLUTION: A dual-port memory comprises: an array 22 of single-port memory elements; a control circuit 30 that is coupled to the array and operable to read data from and write data into the array; a first request generator 60-A operable to receive a first memory access request from the first port; a second request generator 60-B operable to receive a second memory access request from the second port; and an arbitration circuit 64 coupled to the control circuit and the first and second request generators. The arbitration circuit is operable in a synchronous mode in which the first and second request generators are controlled using at least two clock signals having equal frequencies. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013065391(A) 申请公布日期 2013.04.11
申请号 JP20120201000 申请日期 2012.09.12
申请人 ALTERA CORP 发明人 HU RAY RUEY-HSIEN;YU HAIMING;CHOU HAO-YUAN HOWARD
分类号 G11C11/413;G06F12/00 主分类号 G11C11/413
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