| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a receiver capable of efficiently performing continuous detection of a specific pattern and correctly determining the number of the continuous detection. <P>SOLUTION: A receiver comprises: a serial-parallel conversion circuit converting serial data including a specific pattern of M-bit length into parallel data of N-bit (N<M) width; a register group storing the parallel data of the predetermined bit width; a comparison circuit comparing each of a plurality of storage patterns of continuous M bits in the parallel data of the predetermined bit width with the specific pattern; and a detection circuit detecting reception of serial data including the specific pattern in the case that the comparison circuit detects match between a storage pattern whose front is K-th bit (K=0 to N-1) from the front of a N-bit range in a first period of a parallel clock and the specific pattern, and detects match between a storage pattern whose front is a specific bit of the N-bit range in a specific period determined by K, N, Q, and R and the specific pattern, where Q is the quotient of M/N, and R is the remainder. <P>COPYRIGHT: (C)2013,JPO&INPIT |
