发明名称 Address drive circuit and plasma display apparatus
摘要 A circuit configuration for realizing high impedance in an address drive circuit is provided in order to reduce the number of recovery switches without reducing power recovery efficiency. A mechanism for realizing the high impedance in an address drive circuit during a sustain period of a plasma display panel is provided. By achieving the high impedance, capacitance coupling between an X electrode and an address electrode and between a Y electrode and an address electrode can be cancelled, and a power recovery circuit can be simplified without reducing the power recovery efficiency.
申请公布号 US8345034(B2) 申请公布日期 2013.01.01
申请号 US20080333724 申请日期 2008.12.12
申请人 HITACHI, LTD.;FUKUDA TOMOYUKI;KABUTO NOBUAKI;YOKOYAMA JUNICHI;IMURA HISAFUMI 发明人 FUKUDA TOMOYUKI;KABUTO NOBUAKI;YOKOYAMA JUNICHI;IMURA HISAFUMI
分类号 G09G3/28;G09G3/20;G09G3/288;G09G3/291;G09G3/296;G09G3/298;G09G5/00;H05B39/04 主分类号 G09G3/28
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