MODIFIED DYNAMIC ELEMENT MATCHING FOR REDUCED LATENCY IN A PIPELINE ANALOG TO DIGITAL CONVERTER

摘要

A circuit in an analog-to-digital converter, ADC, includes an amplifier (520) configured to receive an output of a backend ADC (512); a harmonic distortion correction circuit, HDC (522), coupled to the amplifier (520) and configured to correct distortion components due to the residue amplifier (506) present in a digital signal from the back-end ADC (512), the HDC circuit (522) providing an output to an adder (530), the adder (530) receiving a coarse digital output from a coarse ADC (502); and a DAC noise cancellation circuit, DNC (526), configured to provide an output to the adder (530), wherein the DNC circuit (526) is configured to correct distortion components due to the DAC (504) present in the digital signal from the backend ADC (512); wherein the output of the adder (530) is an ADC digital output and wherein the ADC digital output forms an input (523) to the HDC and the DNC.