| 摘要 |
PURPOSE: A clock and data recovery circuit is provided to obtain a frequency without limit to a pattern of an input signal by removing a demand of a specific pattern like a training pattern or scrambling data. CONSTITUTION: A recovery circuit comprises(200) comprises a frequency obtaining unit(210) which obtains a clock frequency from an input signal in a delayed locked loop mode and a phase looked loop unit(230) for recovering data. The frequency obtaining unit comprises a voltage controlled delay line unit(211), a CDT(coarse delay tracking) unit(213), a FDT(fine delay tracking) unit(215), a first switch, a second switch, a capacitor, and a reset switch. The phase looked loop unit comprises a voltage controlled oscillator(231), a loop filter(233), a phase detector(235), a first charge pump(237), and a third switch. An input signal is inputted to the frequency obtaining unit and the phase looked loop unit. [Reference numerals] (230) Phase looked loop unit; (AA) Clock data recovery circuit |
