发明名称 RISK-MANAGEMENT DEVICE
摘要 A memory and a processor connected thereto are provided. Said memory stores the following: a plurality of verification units, each comprising one or more scenario-data entries each containing a predicted loss frequency; a verification scope consisting of a collection of verification units; and actual loss occurrence counts corresponding to the scenario-data entries. The processor is programmed to determine whether or not the sum of the loss occurrence counts corresponding to the scenario-data entries included in the verification scope follows a Poisson distribution having a mean equal to the sum of the predicted loss frequencies in said scenario-data entries. Said determination is made by testing goodness of fit with respect to a Poisson distribution.
申请公布号 WO2012132355(A1) 申请公布日期 2012.10.04
申请号 WO2012JP02006 申请日期 2012.03.23
申请人 NEC CORPORATION;MORINAGA, SATOSHI;IMAMURA, SATORU 发明人 MORINAGA, SATOSHI;IMAMURA, SATORU
分类号 G06Q10/06;G06Q40/06 主分类号 G06Q10/06
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