| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an equalization device capable of removing inter-code interference with low power consumption. <P>SOLUTION: The equalization device includes equalization parts 1a and 1b corresponding to clocks of two phases. The equalization parts 1a and 1b include: sample holding parts 2a and 2b which sample and hold an input signal; current integration type addition parts 3a and 3b which integrate and add outputs of the sample holding parts 2a and 2b and determination result signals TAP2-TAPN of a signal received from 2 bits before to N bits before; dynamic threshold control determination latch parts 4a and 4b which determine outputs of the current integration type addition parts 3a and 3b based upon a threshold; inverters 5a and 5b which feed output signals of the dynamic threshold control determination latch parts 4a and 4b back to the equalization parts using opposite-phase clocks as a determination result signal TAP1; and latch parts 6a-1 to 6a-(N-1), and 6a-1 to 6b-(N-1) which output the determination result signals TAP2-TAPN. <P>COPYRIGHT: (C)2012,JPO&INPIT |
