发明名称 |
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having an element isolation structure capable of achieving an element with further reduced parasitic capacitance and to provide a method of manufacturing the same. <P>SOLUTION: A semiconductor device formed on an SOI substrate comprises: an element isolation trench (cavity) 17 formed in an element isolation region; and a cavity region 20 that is formed in a portion of a buried insulating layer interposed between a semiconductor layer 11 and a supporting substrate 13 and contacts the element isolation trench (cavity) 17. This structure can reduce parasitic capacitance and can improve the breakdown voltage of the element. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012142505(A) |
申请公布日期 |
2012.07.26 |
申请号 |
JP20110000900 |
申请日期 |
2011.01.06 |
申请人 |
HITACHI LTD |
发明人 |
KITAZAWA KEIGO;OSHIMA TAKAFUMI |
分类号 |
H01L21/762;H01L21/336;H01L21/76;H01L21/764;H01L21/8234;H01L27/08;H01L27/088;H01L27/12;H01L29/786 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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