发明名称 |
IC die having TSV and wafer level underfill and stacked IC devices comprising a workpiece solder connected to the TSV |
摘要 |
A method of forming integrated circuit (IC) die configured for attachment to another die or a package substrate, and stacked IC devices therefrom. At least one IC die having a top semiconductor surface and a bottom surface and at least one through substrate via (TSV) including a tip protruding beyond the bottom surface to a tip length is provided. The tip has an outer dielectric tip liner, and an electrically conductive portion within the outer dielectric tip liner. A compliant layer is applied to the bottom surface of the IC die. The dielectric tip liner is removed from a distal portion of the tip to expose an electrically conductive tip portion. A solder material is deposited on the exposed distal portion of the tip. The solder material is reflowed and coalesced to form a solder bump on the distal portion of the tip.
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申请公布号 |
US8227295(B2) |
申请公布日期 |
2012.07.24 |
申请号 |
US20090416694 |
申请日期 |
2009.04.01 |
申请人 |
SIMMONS-MATTHEWS MARGARET R.;ABBOTT DONALD C.;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
SIMMONS-MATTHEWS MARGARET R.;ABBOTT DONALD C. |
分类号 |
H01L21/00 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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