发明名称 CLOCK CONTROL CIRCUIT AND TRANSMITTER
摘要 A transmitter 1 comprises a clock generation portion 4, FIFO portion 6, and serial signal creation portion 7. The clock generation portion 4 performs modulation by spectrum spreading of a reference clock CK ref , and generates a first clock CK 1 with a high modulation factor and a second clock CK 2 with a low modulation factor. The FIFO portion 6 takes as inputs the first clock CK 1 which has been output from the clock generation portion 4 to a data generation portion 2 and output from the data generation portion 2, a parallel data signal which has been synchronized with the first clock CK 1 in the data generation portion 2 and output, and the second clock CK 2 output from the clock generation portion 4, and synchronizes the parallel data signal P data with the second clock CK 2 and outputs the parallel data signal P data . The serial signal creation portion 7 converts a parallel data signal PR data into a serial data signal S data .
申请公布号 KR101157755(B1) 申请公布日期 2012.06.25
申请号 KR20107007004 申请日期 2009.12.09
申请人 发明人
分类号 H04L7/04;H04L25/02 主分类号 H04L7/04
代理机构 代理人
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