Error detection in high speed asymmetric interfaces using dedicated interface lines
摘要
<p>A system and method for detecting errors in high-speed asymmetric interfaces are described including transmitting digital data between a first system component and a second system component over a bidirectional interface, wherein the first component is significantly more intelligent than the second component. The first component receives a signature from the second component over a line of the interface concurrent with READ and WRITE operations over the interface. The latency associated with transmission of a signature from the second component to the first component is the time taken for the second component to compute a signature. The signature received is compared to a signature stored by the first component. Both signatures correspond to a particular READ or WRITE command. Based on the comparison, the first component determines whether the READ or WRITE operation was successful, and directs the second component as necessary.</p>
申请公布号
EP2141848(B1)
申请公布日期
2012.04.25
申请号
EP20090013467
申请日期
2006.11.10
申请人
ADVANCED MICRO DEVICES, INC.
发明人
MACRI, JOSEPH;MOREIN, STEPHEN;GAUTHIER, CLAUDE;MING-JU, LEE E.;LIN, CHEN