发明名称 Metal Interconnection Structure and Method For Forming Metal Interlayer Via and Metal Interconnection Line
摘要 There is provided a method for forming a metal interlayer via, comprising: forming a seed layer on a first dielectric layer and a first metal layer embedded in the first dielectric layer; forming a mask pattern on the seed layer to expose a portion of the seed layer covering some of the first metal layer; growing a second metal layer on the exposed portion of the seed layer; removing the mask pattern and a portion of the seed layer carrying the mask pattern to expose side walls of the second metal layer, a portion of the first metal layer and the first dielectric layer; forming an insulating barrier layer on the side walls, the portion of the first metal layer and the first dielectric layer. There is also provided a method for forming a metal interconnection line. Both of them can suppress the occurrence of voids. There is further provided a metal interconnection structure comprising a contact plug, a via and a metal interconnection line, wherein the via is formed on the metal interconnection line, the metal gate and/or the contact plug.
申请公布号 US2012080792(A1) 申请公布日期 2012.04.05
申请号 US201113143507 申请日期 2011.02.17
申请人 ZHAO CHAO;INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES 发明人 ZHAO CHAO
分类号 H01L23/52;H01L21/768 主分类号 H01L23/52
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