发明名称 |
MANUFACTURING METHOD OF WIRING BOARD AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a wiring board, capable of reducing the shift, from a desired pitch, of a pitch of an electrode pad electrically connected with a semiconductor chip. <P>SOLUTION: The manufacturing method of the wiring board includes: a process of forming a recess on the upper surface of a support substrate 11 comprising a material having a thermal expansion coefficient equal to that of a semiconductor substrate configuring a semiconductor chip; a process of forming a peeling layer on the upper surface of the support substrate; a process of forming a metal layer on the peeling layer; a process of forming a first insulation layer 16 on the metal layer; a process of forming a through-hole passing through the first insulation layer 16 so as to expose the metal layer at a position corresponding to the recess; a first wiring layer forming process of forming a first wiring layer 17 on the metal layer exposed inside the through-hole with the metal layer as a seed layer; a laminating process of laminating a wiring layer and an insulation layer further on the first wiring layer 17 and the first insulation layer 16; and a process of removing the support substrate 11 by executing prescribed processing to the peeling layer. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012069972(A) |
申请公布日期 |
2012.04.05 |
申请号 |
JP20110241946 |
申请日期 |
2011.11.04 |
申请人 |
SHINKO ELECTRIC IND CO LTD |
发明人 |
MURAYAMA HIROSHI;HIGASHI MITSUTOSHI;HARUHARA MASAHIRO |
分类号 |
H01L23/12;H01L23/32;H05K3/46 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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